Cache inspection with inspection bypass feature
US7779206B2 · kind B2 · utility
1Cited by
6References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 15, 2006 |
| Grant date | Aug 17, 2010 |
| Priority date | — |
| Expiry date | Jul 28, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3648
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An information carrier medium containing software that, when executed by a processor, causes the processor to receive information from circuit logic that is adapted to collect the information from caches on different cache levels, at least some of the information from caches on different cache levels associated with a common address. The software also causes the processor to selectively bypass a portion of the information specified by a user of the software and to provide non-bypassed information to the user and not said bypassed portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.