Primary side control circuit and method for ultra-low idle power operation
US7779278B2 · kind B2 · utility
11Cited by
48References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 17, 2008 |
| Grant date | Aug 17, 2010 |
| Priority date | — |
| Expiry date | Dec 20, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/156
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method and circuit for reducing power consumption during idle mode to ultra-low levels, such as about 1/10th to 1/1000th or less of active power is disclosed. An ultra-low idle power supply comprises a primary circuit, a secondary circuit and a control circuit. The control circuit monitors behavior of the primary circuit and determines whether an idle state or no load condition exists, and if so the primary circuit is disengaged. By disengaging the primary circuit, the power consumption of the ultra-low idle power supply is reduced to ultra-low levels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.