Reducing power consumption in multiprocessor systems
US7779287B2 · kind B2 · utility
17Cited by
7References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2005 |
| Grant date | Aug 17, 2010 |
| Priority date | — |
| Expiry date | Apr 5, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques that may be utilized in a multiprocessor system to reduce power consumption are described. In one embodiment, one or more internal components of a processor core are clocked at least partially by a frequency controlled clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.