Methods of making and using integrated and testable sensor array
US7781238B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Dec 6, 2007 |
| Grant date | Aug 24, 2010 |
| Priority date | — |
| Expiry date | Feb 11, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for making a testable sensor assembly is provided. The method includes forming a first sensor array on a first substrate having a first side and a second side, wherein the first sensor array is formed on the first side of the first substrate, coupling a first semiconductor wafer having a first side and a second side to the first sensor array, wherein the first side of the first semiconductor wafer is coupled to the first sensor array, thinning one of the second side of the first substrate or the second side of the first semiconductor wafer, and testing the first sensor array to identify operational and non-operational units in the testable sensor assembly before integration of the sensor assembly with interface electronics.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.