Multi-gate field effect transistor and method for manufacturing the same
US7781274B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2008 |
| Grant date | Aug 24, 2010 |
| Priority date | — |
| Expiry date | Sep 15, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
Abstract
A multi-gate field effect transistor includes: a plurality of semiconductor layers arranged in parallel on a substrate; source and drain regions formed in each of the semiconductor layers; channel regions each provided between the source region and the drain region in each of the semiconductor layers; protection films each provided on an upper face of each of the channel regions; gate insulating films each provided on both side faces of each of the channel regions; a plurality of gate electrodes provided on both side faces of each of the channel regions so as to interpose the gate insulating film, provided above the upper face of each of the channel region so as to interpose the protection film, and containing a metal element; a connecting portion connecting upper faces of the gate electrodes; and a gate wire connected to the connecting portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.