Stacked image sensor with shared diffusion regions in respective dropped pixel positions of a pixel array
US7781716B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2008 |
| Grant date | Aug 24, 2010 |
| Priority date | — |
| Expiry date | Aug 5, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/811
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A CMOS image sensor or other type of image sensor comprises a sensor wafer and an underlying circuit wafer. The sensor wafer comprises a plurality of photosensitive elements arranged in respective positions of a two-dimensional array of positions in which a subset of the array positions do not include photosensitive elements but instead include diffusion regions each of which is shared by two or more of the photosensitive elements. The sensor wafer is interconnected with the circuit wafer utilizing a plurality of inter-wafer interconnects coupled to respective ones of the shared diffusion regions in respective ones of the array positions that do not include photosensitive elements. The image sensor may be implemented in a digital camera or other type of image capture device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.