High voltage depletion layer field effect transistor
US7781809B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 6, 2005 |
| Grant date | Aug 24, 2010 |
| Priority date | — |
| Expiry date | Apr 6, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/83
Abstract
In a high voltage junction field effect transistor, a first well (11) of a first conductivity type is formed in a substrate (10) of a second conductivity type. A source (14) and a drain (15) which are each of the first conductivity type are formed in the first well. A gate (16) of the second conductivity type is arranged in a second well (12) of the second conductivity type, wherein the second well is of the retrograde type. The source, gate and drain are spaced apart from one another by field oxide regions (13a to 13d). Field plates (17a, 17b) extend over the field oxide (13a, 13b) from the gate (16) in the direction of source and drain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.