Power supply insensitive voltage level translator
US7782116B2 · kind B2 · utility
3Cited by
5References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 5, 2008 |
| Grant date | Aug 24, 2010 |
| Priority date | — |
| Expiry date | Feb 20, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356182
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit is described that when the power supply to circuits that control a pass transistor is at zero volts, the pass transistor configured as a voltage level translator remains off regardless of the voltages and changes in voltages at the ports connected to the pass transistor. Cross coupled transistors provide a mechanism where the higher of the port voltages is available to power circuitry that maintains the control input of the pass transistor in the off condition. The voltages at the ports may rise and fall relative to each other, but the control input of the pass transistor will keep the pass transistor off.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.