Adaptive signal-feed-forward circuit and method for reducing amplifier power without signal distortion
US7782141B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2008 |
| Grant date | Aug 24, 2010 |
| Priority date | — |
| Expiry date | Dec 29, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/30015
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Digital amplifying circuitry delays a digital data signal (INR) to produce an output signal (VoutR). The delayed digital data signal is converted to an analog signal (VinR) for amplifying by an amplifier (10R). Signal amplitude information (S_R[n]) contained in the incoming digital data signal is detected during the delaying. The signal amplitude information is converted to a first control signal (S_Io_NEG[n]) in response to which an adjustable maximum available supply current of the amplifier is produced of least sufficient magnitude to avoid distortion during the amplifying to produce the output signal. The signal amplitude information also is converted to a second control signal (S_AMPLITUDE[n]) in response to which a supply voltage (VNEG) of the amplifier is controlled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.