Patent · US Active

Data accessing interface having multiplex output module and sequential input module between memory and source to save routing space and power and related method thereof

US7782287B2 · kind B2 · utility

1Cited by
5References
8Claims
0Family size

Assignee

Inventor

Key dates

Filing dateOct 24, 2006
Grant dateAug 24, 2010
Priority date
Expiry dateFeb 24, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG09G2310/0297
  • WIPO fieldAudio-visual technology
  • WIPO sectorElectrical engineering

Abstract

A data accessing interface between memory and source in LCD display IC includes a multiplex output module and a sequential input module. Suppose a row width of the memory is N bit. The multiplex output module is for outputting a row N-bit digital data. The multiplex output module includes a buffer for receiving the row N-bit digital data from the memory; and a multiplex unit for continuously selecting M bits from the N bit digital data to output to source. After N/M times, all of the row N bit digital data will be output to source. The sequential input module includes N latches and N/M latch control signals; when each latch control signal is active, it will latch M bit digital data from the multiplex output into M latches. After N/M latch control signals are active sequentially, the N bit digital data are stored into the N latches for source.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.