Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same

US7782650B2 · kind B2 · utility

Assignee

• Nantero, Inc. · US

Inventors

• Claude L. Bertin · Venice, US
• Thomas Rueckes · Boston, US
• X. M. Henry Huang · Cupertino, US
• Ramesh Sivarajan · Shrewsbury, US
• Eliodor G. Ghenciu · King of Prussia, US
• Steven L. Konsek · Boston, US
• Mitchell Meinhold · Medford, US
• Jonathan W. Ward · Fairfax, US
• Darren K. Brock · Elmsford, US

Key dates

• Filing date: Aug 8, 2007
• Grant date: Aug 24, 2010
• Expiry date: Dec 31, 2027

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S977/943

Abstract

Under one aspect, a memory array includes word lines; bit lines; memory cells; and a memory operation circuit. Each memory cell responds to electrical stimulus on a word line and on a bit line and includes: a two-terminal non-volatile nanotube switching device having first and second terminals, a semiconductor diode element, and a nanotube fabric article capable of multiple resistance states. The semiconductor diode and nanotube article are between and in electrical communication with the first and second terminals, which are coupled to the word line bit line respectively. The operation circuit selects cells by activating bit and/or word lines, detects a resistance state of the nanotube fabric article of a selected memory cell, and adjusts electrical stimulus applied to the cell to controllably induce a selected resistance state in the nanotube fabric article. The selected resistance state corresponds to an informational state of the memory cell.