Patent · US Active

Circuit and method for evaluating the performance of an adaptive decision feedback equalizer-based serializer deserializer and serdes incorporating the same

US7782932B2 · kind B2 · utility

13Cited by
2References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 23, 2004
Grant dateAug 24, 2010
Priority date—
Expiry dateSep 29, 2026

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L25/03057
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A circuit and method for evaluating serializer deserializer (SERDES) performance that is particularly advantageous when the SERDES has a decision feedback equalizer (DFE). In one embodiment, the circuit has a data processing path and an operational feedback loop coupled to said data processing path and containing an equalizer, perhaps a DFE. In that embodiment, the circuit includes an eye scanning circuit coupled to said data processing path but separate from said equalizer and configured to measure at least one dimension of an eye relative to which said equalizer is configured for operation without substantially affecting said operation.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.