System and method of identifying and storing memory error locations
US7783919B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2007 |
| Grant date | Aug 24, 2010 |
| Priority date | — |
| Expiry date | Dec 1, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1008
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method of identifying and storing memory error locations is disclosed. In one form, a method of using a memory is disclosed. The method can include detecting a memory error during execution of a run time environment within an information handling system, and determining if the memory error is a correctable memory error. The method can also include identifying a first memory location within a first memory device causing the memory error, and storing a first reference to the first memory location within a persistent memory. The method can further include disabling use of the first memory location during use of the run time environment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.