Memory arbitration technique for turbo decoding
US7783936B1 · kind B1 · utility
7Cited by
9References
9Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 28, 2006 |
| Grant date | Aug 24, 2010 |
| Priority date | — |
| Expiry date | Jun 24, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6566
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A technique for resolving access contention in a parallel turbo decoder is described. The technique includes associating a plurality of buffer memories with the subdecoders so that accesses to banks of a shared interleaver memory can be rescheduled. Accesses can be rescheduled to prevent simultaneous accesses to a single bank of the shared interleaver memory based on an interleaver pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.