Nonvolatile semiconductor memory device
US7786526B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2007 |
| Grant date | Aug 31, 2010 |
| Priority date | — |
| Expiry date | Jul 27, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
It is an object of the present invention to provide a nonvolatile semiconductor memory device which has superior writing characteristics and electric charge retention characteristics. In addition, it is an object of the present invention to provide a nonvolatile semiconductor memory device in which a writing voltage can be reduced. The nonvolatile semiconductor memory device includes a semiconductor region with a channel formation region formed between a pair of impurity regions which are formed to be apart from each other; and a first insulating layer, a charge accumulation layer, a second insulating layer, and a control gate are formed in a location which is a top layer portion of the semiconductor region and which roughly overlaps with the channel formation region. The charge accumulation layer is insulative and is formed as a layer in which electric charge can be trapped.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.