Integrated circuits with hybrid planer hierarchical architecture and methods for interconnecting their resources
US7786757B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2008 |
| Grant date | Aug 31, 2010 |
| Priority date | — |
| Expiry date | Apr 15, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17796
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Methods for interconnecting base, switching and interconnect resources for configurable integrated circuits are provided, where these methods include the following steps: interconnecting base and switching resources with interconnect resources to form a hierarchical interconnect structure; physically placing the hierarchical interconnect structure in a two dimensional format; and directly interconnecting selected neighboring base and switching resources. The integrated circuits generated include base resources, interconnect resources; and switching resources that are interconnected to form a hierarchical interconnect structure, and, additional interconnect resources that directly interconnect neighboring switching or base resources.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.