Patent · US Active

Dynamic real-time delay characterization and configuration

US7787314B2 · kind B2 · utility

0Cited by

6References

18Claims

0Family size

Assignee

Altera Corporation · US

Inventors

Jun Tan · Kepong, MY
Wei Yee Koay · Kampung Bukit Kechil, MY
Boon Jin Ang · Butterworth, MY
Choong Kit Wong · Bayan Lepas, MY
Guang Sheng Soh · Gemas, MY

Key dates

Filing date	Sep 11, 2008
Grant date	Aug 31, 2010
Priority date	—
Expiry date	Feb 17, 2029

Classification

Technology area (CPC H)Electricity
CPC primaryH03K5/133
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In mask programmable integrated circuit, such as a structured ASIC, a delay chain provides a delay that is set by a mask programmable switch. The delay chain receives an input to allow the delay mask programmed delay to be overridden using a JTAG controller. This allows testing of different delays. The input may also be provided by a fuse block, so that the fuse block can override the mask programmable switch, thus allowing a delay to be changes after mask programming.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.