Address buffer mode switching for varying request sizes
US7788420B2 · kind B2 · utility
1Cited by
20References
20Claims
0Family size
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Key dates
| Filing date | Sep 22, 2005 |
| Grant date | Aug 31, 2010 |
| Priority date | — |
| Expiry date | Jul 27, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0689
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A plurality of modes is provided for communicating between a host system and a peripheral storage system controller. A first communication mode may be selected from the plurality of communication modes based on a bit length required to communicate a physical address. During runtime, a switch from the first communication mode to a second communication mode may be performed in order to improve the efficiency of processing address requests at the storage system controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.