Method for optimizing integrated circuit device design and service
US7788646B2 · kind B2 · utility
9Cited by
8References
12Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 14, 2005 |
| Grant date | Aug 31, 2010 |
| Priority date | — |
| Expiry date | Jul 1, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3323
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Improved analysis and refinement of integrated circuit device design and other programs is facilitated by methods in reach-ability analysis is performed using hints which define a particular path through a program. To ensure that a reasonable number of states are reached during reach-ability analysis a order to apply the hints is determined. The ordering prioritizes hints which define program paths which set a given variable over hints which define program slice which use the given variable.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.