Mechanism for ordering lists of local variables associated with a plurality of code blocks
US7788655B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 30, 2005 |
| Grant date | Aug 31, 2010 |
| Priority date | — |
| Expiry date | Jul 1, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/45516
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A compilation mechanism is disclosed for facilitating the keeping of local variables in the same hardware registers across multiple code blocks. In one implementation, each code block has a list of local variables associated therewith. This list of local variables represents the local variables that should be loaded into registers prior to entering a code block. For multiple code blocks, the various lists may have local variables in common. In one implementation, the mechanism orders the local variables in the various lists in such a manner that, as much as possible, the same local variables are placed in the same slots of the various lists. By doing so, the mechanism minimizes the movement of local variables from register to register when going from code block to code block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.