Method for manufacturing a tamper-proof cap for an electronic module
US7788801B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2006 |
| Grant date | Sep 7, 2010 |
| Priority date | — |
| Expiry date | Jul 7, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49174
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A tamper-proof cap adapted to be mounted on a large assembly for shielding a selected area of the large assembly is disclosed. The tamper-proof cap comprises a laminate stack-up structure wherein at least one open chamber is formed. The stack-up structure comprises at least two layers wherein tamper-proof layers are formed on top of the open chamber. A plurality of vias are disposed around the open chamber, forming with said tamper proof layers a tamper-proof structure around said open chamber. The vias are adapted for connecting the tamper-proof layers to the large assembly when the tamper-proof cap is mounted. In a preferred embodiment, the tamper-proof cap further comprises a shielding layer on top of the tamper-proof layer that are preferably done using conductive ink.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.