High-performance FET device layout

US7791160B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Jonghae Kim · San Diego, US
• Sungjae Lee · Burlington, US
• Jean-Olivier Plouchart · New York, US
• Scott K. Springer · Burlington, US

Key dates

• Filing date: Oct 25, 2007
• Grant date: Sep 7, 2010
• Expiry date: Jun 15, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/01

Abstract

A fast FET, a method and system for designing the fast FET and a design structure of the fast FET. The method includes: selecting a reference design for a field effect transistor, the field effect transistor including a source, a drain, a channel between the source and drain, a gate electrode over the channel, at least one source contact to the source and at least one contact to the drain, the at least one source contact spaced a first distance from the gate electrode and the at least one drain contact spaced a second distance from the gate electrode; and adjusting the first distance and the second distance to maximize a performance parameter of the field effect transistor to create a fast design for the field effect transistor.