Patent · US Active

Integrated circuit with switching unit for memory cell coupling, and method for producing an integrated circuit for memory cell coupling

US7791940B2 · kind B2 · utility

0Cited by
5References
24Claims
0Family size

Assignee

Inventor

Key dates

Filing dateOct 9, 2008
Grant dateSep 7, 2010
Priority date
Expiry dateApr 14, 2029

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D89/10
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An integrated circuit has a plurality of first memory cells, which are electrically coupled along a first line, and additionally has a plurality of second memory cells which are electrically coupled along a second line. The integrated circuit furthermore has a switching unit having a plurality of switching elements having in turn a first contact and a second contact. The first contact of a first switching element is coupled to the plurality of first memory cells, and the first contact of a second switching element is coupled to the plurality of second memory cells. In addition, the first contact of a third switching element is coupled to the second contact of the first switching element, and the first contact of a fourth switching element is coupled to the second contact of the second switching element.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.