Global shared memory subsystem
US7793051B1 · kind B1 · utility
5Cited by
1References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2007 |
| Grant date | Sep 7, 2010 |
| Priority date | — |
| Expiry date | Sep 7, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0253
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An embodiment of the present invention is directed to an apparatus for sharing memory among a plurality of compute nodes. The apparatus includes a memory, a plurality of interfaces for coupling the apparatus with the compute nodes, a switching fabric coupled with the interfaces, and a processor coupled with the switching fabric and the memory. The processor is operable to assign a portion of the memory to a particular compute node for exclusive access by the particular compute node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.