Method and circuit for matching semiconductor device behavior
US7793235B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 2007 |
| Grant date | Sep 7, 2010 |
| Priority date | — |
| Expiry date | Nov 27, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1737
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A design structure and method. The design structure comprises a selection circuit comprising a logic circuit, an array of sub-circuits and a switching circuit electrically coupled to each other. The selection circuit is subjected to a first operating condition. The switching circuit selects a group of sub-circuits from the array. The selection circuit generates a first frequency. The selection circuit is subjected to a second operating condition that is different from the first operating condition and generates a second frequency. A first frequency differential between the first frequency and the second frequency is compared to a predetermined frequency differential to determine if the first frequency differential is about equal to the predetermined frequency differential.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.