Method of forming a split gate memory device and apparatus

US7795091B2 · kind B2 · utility

Inventors

• Brian A. Winstead · Austin, US
• Rajesh A. Rao · Austin, US
• Spencer E. Williams · Austin, US

Key dates

• Filing date: Apr 30, 2008
• Grant date: Sep 14, 2010
• Expiry date: Jul 24, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/697

Abstract

A split-gate memory device has a select gate having a first work function overlying a first portion of a substrate. A control gate having a second work function overlies a second portion of the substrate proximate the first portion. When the majority carriers of the split-gate memory device are electrons, the first work function is greater than the second work function. When the majority carriers of the split-gate memory device are holes, the first work function is less than the second work function. First and second current electrodes in the substrate are separated by a channel that underlies the control gate and select gate. The differing work functions of the control gate and the select gate result in differing threshold voltages for each gate to optimize device performance. For an N-channel device, the select gate is P conductivity and the control gate is N conductivity.