Patent · US Active

Semiconductor device and method of manufacturing the same

US7795678B2 · kind B2 · utility

3Cited by
0References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 12, 2008
Grant dateSep 14, 2010
Priority date
Expiry dateJul 21, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B12/09
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor device includes a buried isolation pattern between an active pattern on which transistors are formed and a substrate. The active pattern has adjacent sections each extending longitudinally in a first direction. A field isolation pattern is interposed between the adjacent sections of the active pattern. The buried isolation pattern has sections spaced apart from each other in the first direction under each section of the active pattern. Each section of the buried isolation pattern extends from a lower portion of the field isolation pattern in a second direction perpendicular to the first direction. At least one gate structure is disposed on each section of the active pattern, and an impurity region is located adjacent to the gate structure at the upper surface of the active pattern. The impurity region is spaced from the buried isolation pattern in a third direction perpendicular to the first and second directions. The buried isolation pattern offers a control on the body effect caused by a bias applied to the substrate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.