Logic circuit
US7795923B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 13, 2009 |
| Grant date | Sep 14, 2010 |
| Priority date | — |
| Expiry date | Oct 13, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0008
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A logic circuit includes first, second, third and fourth transistors. The first transistor is a first type, and has a gate terminal for receiving a control signal representative of one of NAND and NOR operations of at least first and second signals, a first terminal coupled to a first power source, and a second terminal serving as an output terminal of the logic circuit. The second transistor is a second type, and has a first terminal for receiving a third signal, and gate and second terminals respectively coupled to the gate and second terminals of the first transistor. Each of the third and fourth transistors is the first type and has a gate terminal. The gate terminals of the third and fourth transistors are respectively adapted to receive the first and second signals. The series-connected third and fourth transistors are connected in parallel to the second transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.