Programmable memory cell
US7796418B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2008 |
| Grant date | Sep 14, 2010 |
| Priority date | — |
| Expiry date | Dec 5, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A disclosed embodiment is a programmable memory cell comprising an elevated ground node having a voltage greater than a common ground node by an amount substantially equal to a voltage drop across a trigger point adjustment element. In one embodiment, the trigger point adjustment element can be a diode. The trigger voltage of the programmable memory cell is raised closer to a supply voltage when current passes through the trigger point adjustment element during a write operation. The programmable memory cell can comprise a pair of cross-coupled inverters, and first and second programmable antifuses that can be coupled to each inverter in the pair of cross-coupled inverters. Since the trigger voltage of the programmable memory cell is raised closer to the supply voltage, a programmed antifuse can easily reach below the trigger voltage and result in a successful write operation even when the supply voltage is a low voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.