Configurable memory system and method for providing atomic counting operations in a memory device
US7797503B2 · kind B2 · utility
13Cited by
1References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 26, 2007 |
| Grant date | Sep 14, 2010 |
| Priority date | — |
| Expiry date | Dec 17, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/206
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system and method for providing atomic memory-based counter operations to operating systems and applications that make most efficient use of counter-backing memory and virtual and physical address space, while simplifying operating system memory management, and enabling the counter-backing memory to be used for purposes other than counter-backing storage when desired. The encoding and address decoding enabled by the invention provides all this functionality through a combination of software and hardware.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.