Patent · US Active

Apparatus and method for merging data blocks with error correction code protection

US7797609B2 · kind B2 · utility

62Cited by
14References
21Claims
0Family size

Assignee

Inventor

Key dates

Filing dateAug 19, 2004
Grant dateSep 14, 2010
Priority date
Expiry dateJan 10, 2028

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/10
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An apparatus and method for selectively deriving Error Correction Codes (ECCs) or other data integrity information for integration into merged data blocks. First data is merged into second data that is error-protected using an ECC generated by a coding algorithm. Bytes or other data units are identified in the first data to be merged into the second data. It is determined whether each of the check bits of the ECC will differ from its original state in response to merging the first and second data. The check bits of the ECC that have been determined to differ from their respective original states are modified to create a “merged ECC.” The resulting data block includes the merged data and the merged ECC.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.