Digital implementation of an enhanced minsum algorithm for error correction in data communications
US7797613B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2007 |
| Grant date | Sep 14, 2010 |
| Priority date | — |
| Expiry date | Jul 16, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/2957
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An iterative error correcting decoder is provided. In one implementation, the iterative error correcting decoder includes an equality constraint node and a parity check node, the parity check node. The parity check node includes parity logic configured to receive input data bits from the equality constraint node and determine a first minimum value and a second minimum value associated with the input data bits using a MinSum algorithm. An enhancement function is performed on the first minimum value and the second minimum value. The enhancement function compares each of the first minimum value and the second minimum value with a first pre-determined constant value, and responsive to the first minimum value and the second minimum value being smaller than the first pre-determined constant value, the enhancement function passes the first minimum value and the second minimum value without any changes as output of the MinSum algorithm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.