Patent · US Active

Analog/digital partitioning of circuit designs for simulation

US7797659B2 · kind B2 · utility

10Cited by
1References
11Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 29, 2007
Grant dateSep 14, 2010
Priority date
Expiry dateOct 26, 2028

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2117/08
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

For increasing user control and insight into preparing a mixed-signal semiconductor design specification for simulation, there are provided methods responsive to commands that provide control over resolution of disciplines and partitioning of the design into analog and digital portions. In some aspects, the methods provide block-based assignment of disciplines, as well as design partitioning. In other aspects, the methods provide for resolving a discipline to apply in a block from among multiple possible disciplines. In some aspects, error flagging may be available for detecting disciplines different from what provided for assignment in a block. Assignments may be indicated based on instance, cell, terminal, or library names and may be specified with wild cards. In still other aspects, the methods may be embodied by instructions on computer readable media, and in systems comprising general and special purpose computer hardware that may communicate with various storage facilities and over various networks.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.