Lateral DMOS device structure and fabrication method therefor
US7799626B2 · kind B2 · utility
2Cited by
4References
12Claims
0Family size
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Inventor
Key dates
| Filing date | Jun 5, 2008 |
| Grant date | Sep 21, 2010 |
| Priority date | — |
| Expiry date | Jul 10, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
Abstract
A lateral DMOS device and a fabrication method therefor that may include forming a second conductive type well in a first conductive type semiconductor substrate and forming a Schottky contact in contact with the second conductive type well in a Schottky diode region, thereby preventing breakdown of the device due to high voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.