Method for manufacturing semiconductor device with planer gate electrode and trench gate electrode
US7799667B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2008 |
| Grant date | Sep 21, 2010 |
| Priority date | — |
| Expiry date | Aug 27, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/518
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes: a semiconductor substrate with a principal plane; a base region disposed on the principal plane; a source region disposed on the principal plane in the base region to be shallower than the base region; a drain region disposed on the principal plane, and spaced to the base region; a trench disposed on the principal plane; a trench gate electrode disposed in the trench through a trench gate insulation film; a planer gate electrode disposed on the principal plane of the semiconductor substrate through a planer gate insulation film; and an impurity diffusion region having high concentration of impurities and disposed in a portion of the base region to be a channel region facing the planer gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.