Nonvolatile memory device and method of fabricating the same
US7800162B2 · kind B2 · utility
2Cited by
2References
18Claims
0Family size
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Key dates
| Filing date | Sep 23, 2008 |
| Grant date | Sep 21, 2010 |
| Priority date | — |
| Expiry date | Dec 4, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A nonvolatile memory device includes a semiconductor substrate, a tunneling insulation layer on the semiconductor substrate, a charge storage layer on the tunneling insulation layer, an inter-electrode insulation layer on the charge storage layer, and a control gate electrode on the inter-electrode insulation layer. The inter-electrode insulation layer includes a high-k dielectric layer having a dielectric constant greater than that of a silicon nitride, and an interfacial layer between the charge storage layer and the high-k dielectric layer. The interfacial layer includes a silicon oxynitride layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.