Patent · US Active

Information processing apparatus and phase control method

US7800421B2 · kind B2 · utility

2Cited by
3References
4Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 27, 2007
Grant dateSep 21, 2010
Priority date
Expiry dateSep 15, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04J3/0688
  • WIPO fieldTelecommunications
  • WIPO sectorElectrical engineering

Abstract

An apparatus includes plural combinations of a clock supplier and a clock supply destination supplied with a clock from the clock supplier. The clock supply destination includes a return route through which the clock supply destination returns a clock to a corresponding clock supplier. The clock supplier includes a variable delay unit that adds a delay to the clock to be supplied to a corresponding clock supply destination; a comparison-reference-clock supply unit that supplies a comparison reference clock having the same phase as that of a comparison reference clock supplied from other clock supplier; a phase comparator that compares the phase of a return clock returned from a corresponding clock supply destination with that of the comparison reference clock; and a phase-difference control unit that controls the delay, so that the phases of the return clock and the comparison reference clock coincide with each other, based on the comparison result.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.