Carrier phase and symbol timing recovery circuit for an ATSC receiver and method of recovering a carrier phase and a symbol timing in received digital signal data
US7801249B2 · kind B2 · utility
3Cited by
6References
31Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2005 |
| Grant date | Sep 21, 2010 |
| Priority date | — |
| Expiry date | May 19, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N7/015
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A carrier phase and symbol timing recovery circuit and method may be used for robust synchronization in a broadcasting ATSC receiving system. Carrier phase and symbol timing offsets may be simultaneously adjusted by using redundancy information contained in an ATSC signal spectrum. A desired sampling time instant and carrier phase offset for synchronization may be simultaneously obtained due to correlation between carrier phase and symbol timing detectors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.