Command-based control of NAND flash memory
US7802061B2 · kind B2 · utility
11Cited by
6References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2006 |
| Grant date | Sep 21, 2010 |
| Priority date | — |
| Expiry date | Jun 30, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Some embodiments of the invention use a command-based interface to control reads and writes with non-volatile memory devices. This may reduce the number of pins that are needed on each integrated circuit, and therefore reduce the cost and size of those integrated circuits. In some embodiments, an on-die cache buffer may be used to buffer data transfers between a high-speed memory bus and the slower speed non-volatile array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.