Decoder system for data encoded with interleaving and redundancy coding
US7802165B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 17, 2006 |
| Grant date | Sep 21, 2010 |
| Priority date | — |
| Expiry date | Jun 19, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0054
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Systems and methods for processing data signals are described. In one implementation, a demodulator and a first decoder unit, such as a convolutional encoder or a quadrature amplitude modulation decoder, for receiving the output of the demodulator, decoding the second level of encoding and outputting a decoded signal and a first error indication signal indicative of errors in the decoded signal are provided. The decoded signal may be passed through a de-interleaving unit to form a de-interleaved signal. The first location signal may be passed to an identifier unit which receives it, and from it produces a second error indication signal indicative of the errors in the de-interleaved signal. The de-interleaved signal and the second error indication signal may be transmitted to a redundancy decoder, where the signals may be used to perform redundancy decoding.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.