Patent · US Active

Timed loop with sequence frames structure for a graphical program

US7802229B2 · kind B2 · utility

17Cited by
7References
34Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 15, 2005
Grant dateSep 21, 2010
Priority date
Expiry dateJul 22, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/323
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A “timed loop with frames” node may be included in a graphical program. The “timed loop with frames” node may combine a timed loop with a timed sequence such that the timed sequence is executed at each iteration of the timed loop. The “timed loop with frames” node may be configured with first execution timing information that controls execution timing for the iterations of the loop. A plurality of graphical code portions may be included in the “timed loop with frames” such that a sequential order of execution for the graphical code portions is specified. The “timed loop with frames” node may be configured with second execution timing information that controls execution timing for the graphical code portions executed at each iteration.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.