Method for encapsulating a device in a microcavity
US7803665B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 6, 2006 |
| Grant date | Sep 28, 2010 |
| Priority date | — |
| Expiry date | Feb 6, 2026 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2203/0145
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Manufacturing a semiconductor device involves forming (200) a sacrificial layer where a micro cavity is to be located, forming (210) a metal layer of thickness greater than 1 micron over the sacrificial layer, forming (220) a porous layer from the metal layer, the porous layer having pores of length greater than ten times their breadth, and having a breadth in the range 10 nm-500 nanometers. The pores can be created by anodising, electrodeposition or dealloying. Then the sacrificial layer can be removed (230) through the porous layer, to form the micro cavity, and pores can be sealed (240). Encapsulating MEMS devices with a porous layer can reduce costs by avoiding using photolithography for shaping the access holes since the sacrificial layer is removed through the porous membrane.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.