High signal level compliant input/output circuits
US7804334B2 · kind B2 · utility
5Cited by
39References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2008 |
| Grant date | Sep 28, 2010 |
| Priority date | — |
| Expiry date | Jul 29, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00315
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A level detector has an input circuit adapted to accept signals of multiple signal levels for detecting a specific level. The signal levels include a first signal level and a larger second signal level. Electronic components of the input circuit have reliability levels less than the second signal level. A latch circuit is coupled to the input circuit for latching a signal consistent with a detected level of an accepted signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.