Interface and related methods for rate pacing in an ethernet architecture
US7804847B2 · kind B2 · utility
1Cited by
16References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2007 |
| Grant date | Sep 28, 2010 |
| Priority date | — |
| Expiry date | Feb 19, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/385
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An interface and related methods for rate pacing in an Ethernet architecture are described herein. In an embodiment, an effective data rate of communication channel with a remote network device is reduced based, at least in part, on an identified processing capability of the remote network device. In one embodiment, to reduce the effective data rate, one or more idle control elements are inserted between at least two frames of substantive content based, at least in part, on the processing capability of the remote network device. Other embodiments are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.