Method for generating compiler, simulation, synthesis and test suite from a common processor specification
US7805690B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 1, 2007 |
| Grant date | Sep 28, 2010 |
| Priority date | — |
| Expiry date | Sep 23, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG16Z99/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A hardware/software design tool converts an electronic design specification and zero or more technology specifications into realization of the electronic design in computer hardware, software and firmware. It compiles design and logic technology specifications into a model which can be utilized for behavioral analysis of logical characteristics. It translates partitions of the design and one or more logic technologies into one or more processor intermediates or binaries suitable for execution on multi-purpose processing units. It translates partitions of the design and logic technology into a collection of cells and interconnects suitable for input to physical design processes such as is required to target a FPGA, ASIC, system-on-a-chip or custom logic. It analyzes behavior of the embedded binaries running on processing units and implementations augmented by additional physical technology and parameters, yielding a more detailed prediction of the resulting hardware/software system behavior when realized through manufacturing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.