Reconfigurable computing machine and related systems and methods
US7809982B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 3, 2005 |
| Grant date | Oct 5, 2010 |
| Priority date | — |
| Expiry date | Feb 23, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2038
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computing machine comprises an electronic circuit operable to perform a function, a programmable integrated circuit such as an FPGA, and a processor. The processor is operable to detect a failure of the electronic circuit and to configure the programmable integrated circuit to perform the function of the electronic circuit in response to detecting the failure. Alternatively, the computing machine comprises a hardwired pipeline operable to perform a function and a processor operable to detect a failure of the pipeline and to perform the function in response to detecting the failure. By allowing a first type of circuit (e.g., an FPGA) to take over for a failed second type of circuit (e.g., a processor), such a computing machine can be fault-tolerant without having redundant versions of each component, and may thus be less expensive and smaller than computing machines of comparable computing power.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.