Circuit timing monitor having a selectable-path ring oscillator
US7810000B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 14, 2006 |
| Grant date | Oct 5, 2010 |
| Priority date | — |
| Expiry date | Jul 24, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31726
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An in-circuit timing monitor having a selectable-path ring oscillator circuit provides delay and performance measurements in an actual circuit environment. A test mode signal is applied to a digital circuit to de-select a given functional input signal applied to a functional logic block within the digital circuit and replace it with feedback coupled from an output of the functional logic block, when test mode operation is selected. The signal path from the de-selected input to the output is selected so that the signal path will oscillate, and a characteristic frequency or phase of the output signal is measured to determine the delay. Other inputs to the functional logic block are set to a predetermined set of logic values. The selection may be made at a register preceding the digital inputs or made in the first level of logic of the functional logic block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.