Semiconductor package, printed circuit board, and electronic device
US7812265B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 21, 2008 |
| Grant date | Oct 12, 2010 |
| Priority date | — |
| Expiry date | Nov 21, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided are a semiconductor package and a method for forming the same, and a PCB (printed circuit board). The semiconductor package comprises: a PCB including a slit at a substantially central portion thereof, the PCB including an upper surface and a lower surface; a semiconductor chip mounted on the upper surface of the PCB; an upper molding layer disposed on the upper surface and covering the semiconductor chip; and a lower molding layer filling the slit and covering a portion of the lower surface of the PCB, wherein the PCB comprises a connecting recess at a side surface thereof, and the upper molding layer and the lower molding layer are in contact with each other at the connecting recess.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.