High-speed signal detect for serial interface
US7812591B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2008 |
| Grant date | Oct 12, 2010 |
| Priority date | — |
| Expiry date | Dec 28, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R19/16566
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
More accurate signal detection circuitry in serial interfaces, particularly on a programmable integrated circuit device, such as a PLD, includes a high-speed, high-resolution, high-bandwidth comparator, along with digital filtering, to reduce the effect of process, temperature or supply variations. The comparator is used to compare a direct input signal with a programmable reference voltage, and, in a preferred embodiment, can detect the signal level within 8 mV accuracy. The output of the comparator may then be digitally filtered. Preferably, both a high-pass digital filter and a low-pass analog filter may be used to eliminate glitches and low-frequency noise. Preferably, the digital filters are programmable to adjust the sensitivity to noise. The filtered output is then latched and output to indicate receipt or loss of signal. This signal detect circuitry can operate reliably at data rates as high as 7 Gbps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.