Digital frequency detector and digital phase locked loop using the digital frequency detector
US7812644B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2008 |
| Grant date | Oct 12, 2010 |
| Priority date | — |
| Expiry date | Apr 14, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/091
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital frequency detector and a digital phase locked loop (PLL) are provided. The digital frequency detector includes a first conversion unit which outputs a first frequency as first frequency information of a digital type using a first ring oscillator that operates in a high-level period of the first frequency, a second conversion unit which outputs a second frequency as second frequency information of a digital type using a second ring oscillator that operates in a high-level period of the second frequency, and an operation unit which outputs a digital frequency for the first frequency by calculating a ratio of the first frequency information to the second frequency information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.